1. Field of the Invention
This invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method of forming multilayer wirings on a semiconductor substrate with high yield.
2. Description of the Prior Art
Semiconductor integrated circuits have been used for saving space and cost in a variety of electronic systems and devices. It is always desirable to further reduce total chip size with any given circuit function. For this purpose, circuit elements in the integrated circuit are first minimized in physical size on a semiconductor substrate. But circuit wirings are still required on the limited surface area over the semiconductor substrate. Multilayer wirings on the limited surface area allow the circuit wirings to cross freely.
In a process of making the multilayer wirings, great attention has been paid to avoiding circuit discontinuities due to surface roughness. One of the inventors has previously proposed the introduction of a spin-on-glass technique for the formation of an insulating layer between wirings, in Japanese Pat. No. 865422. According to the proposed process, the spin-on-glass layer is formed on the entire surface of the semiconductor substrate having a first wiring layer. The source material of the spin-on-glass layer may be a type of silanol solution. This solution may be applied to the substrate surface by means of the same spinner which is used for spin-coating the photoresist. The substrate is then subjected to a heating process for solidifying the coating. In FIG. 1, there is shown a cross section of the substrate covered with the spin-on-glass layer. The substrate 10 is first covered with the surface insulating layer 11 and the first wiring layer 12. The spin-on-glass layer 13 accumulates in the step portion of each side of the layer 12 which causes the surface roughness. The glass layer 13 effectively covers the steps to provide a smoothed top surface. The insulating layer 14 is deposited on the smoothed top surface by means of the well known chemical vapor deposition apparatus. It was expected that the smoothed top surface would successively provide a smooth surface on the insulating layer 14. But it was found that the insulating layer 14 still had the stepped surface at each side of the layer 12 due to the deposition characteristics of the layer 14, although the degree of the step was somewhat reduced. The second wiring layer 15 is placed on the stepped surface of the insulating layer 14. In practice, aluminum is vapor deposited on the surface of a plurality of semiconductor substrates for mass production. As shown in FIG. 1, the second wiring layer 15 is substantially reduced in thickness at the stepped portion on the semiconductor substrate toward which the aluminum vapor was not directed uniformly. In the worst case, the second wiring layer 15 is electrically isolated at the stepped portion whereby the production yield has been limited to around fifty percent.
Another technique is seen in Japanese Pat. Nos. 48-79987 and 48-83788 which were laid open on the dates of Oct. 26, 1973 and Nov. 8, 1973, respectively. Both publications disclose a process for manufacturing the multilayer wirings in which the insulating layer 14 is firstly deposited in contact with the first wiring layer 12 and the spin-on-glass layer is then coated on the insulating layer 14 with a smoothed surface. The upper wiring is formed on the smoothed surface of the insulating layer 14. According to the disclosure, the process is not affected by the deposition characteristics of the insulating layer 14, whereby a more reliable mass production can be expected. However, we have realized that an over-etching of the spin-on-glass layer could easily occur in opening the windows in the underlying insulating layer 14, thereby forming the stepped portion again. The typical manner of such damage is shown in FIG. 2 in which the same reference number is used for identifying the same materials.